RESULT PAPER: LOW NOISE AMPLIFICATION CMOS TECHNIQUE
The wireless communication industry is currently experiencing tremendous growth. In responding to the demand for a low-cost but high performance wireless front-end, many intensive researches on CMOS radio-frequency (RF) front-end circuits have been carried out. The ultimate goal is to minimize the trade-off between high performance and low-cost, low power consumption design. Low noise amplifier (LNA) is typically the first stage of a receiver. Its performance greatly affects the overall receiver performance. In this thesis, four LNAs are proposed. They are designed for the IEEE 802.15.4 standard in the 2.4 GHz ISM band. The first three LNAs are optimized for low NF and low power. An application of this type of LNA is to be used as the amplification stage before the active mixer in the receiver chain. Active mixer provides active gain while consuming some dc power. Therefore, high LNA gain is required in this type of system. There is one important contribution in this research. Firstly, LNA (LNA1) that combining the merits of the inductive source degeneration common-source LNA (L-CSLNA) and the common-gate LNA (CGLNA) is introduced. The proposed LNA1 is a fully differential -boosting CGLNA with series inductor input matching network that improves the NF. The circuit's input matching, NF and gain have been derived to verify the design methodology. The LNA was designed and fabricated using 0.18 µm CMOS technology. It consumes only 0.98 mA from 1.0 V power supply and achieves a measured gain of 15 dB and NF of 5 dB. The series inductor input matching CGLNA is attractive for low-power fully integrated applications in CMOS technologies. Even though the high NF problem of the CGLNA has been addressed in the proposedLNA1, we wish to further reduce the NF to achieve better trade-off between NF and power consumption.
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